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1 ds9986-00 may 2011 www.richtek.com RT9986 7-ch dc/dc converter for dsc general description the RT9986 is a complete power supply solution for digital still cameras and other handheld devices. it includes one synchronous step-up dc/dc converter with load disconnect, one selectable synchronous step-up/step- down dc/dc converter, two synchronous step-down dc/ dc converters, one synchronous high voltage step-up dc/ dc converter, one inverting dc/dc converter, and one selectable synchronous high voltage step-up/current- source for wled. in addition, the RT9986 also includes one rtc_ldo, one voltage detector, and one system reset. all power mosfets are addition in the RT9986. the RT9986 is designed to fulfill the applications for dsc as follows : ch1 is a synchronous step-up output for motor or dsc system i/o power ch2 is a selectable synchronous step-up/step-down output for motor or dsc system i/o power ch3 and ch4 are synchronous step-down outputs for dsp core and memory power supply ch5 is a synchronous high voltage step-up output for ccd bias power supply ch6 is an inverting output for negative ccd bias power supply ch7 is a selectable synchronous high voltage step-up/ current source for driving wled the selectable step-up/step-down converter can be auto selected by external component topology. for the RT9986, all 7-chs have built in internal compensation. the RT9986 also provides a transformerless inverting converter for supplying ccd power. for the low voltage synchronous step-up and step down converters, efficiency can be up to 95%. the RT9986 provides comprehensive protection features including over current protection, thermal shutdown protection, over voltage protection, overload protection, and under voltage protection. features z z z z z ch2 step-up/step-down auto-selected by external topology z z z z z preset on/off sequence of ch1, ch2, ch3, ch4 (1 3 4 2) z z z z z preset on/off sequence of ch5, ch6 (5 6) z z z z z all channels with internal compensation z z z z z all power switches integrated z z z z z all step-up converter with load disconnect z z z z z step-down dc/dc converter ` ` ` ` ` up to 95% efficiency ` ` ` ` ` 100% (max) duty cycle z z z z z low voltage step-up dc/dc converter ` ` ` ` ` adjustable output voltage ` ` ` ` ` up to 95% efficiency z z z z z wled driver ` ` ` ` ` auto-selected by external topology ` ` ` ` ` current source mode with 30ma dc current ` ` ` ` ` step-up mode with led open protection (ovp7) ` ` ` ` ` direct pwm dimming control z z z z z fixed 2mhz switching frequency for ch1/2/3/4, fixed 1mhz switching frequency for ch5/6/7 z z z z z small 32-lead wqfn package z z z z z rohs compliant and halogen free applications z digital still camera z pda z portable devices marking information 13= : product code ymdnn : date code 13=ym dnn
2 ds9986-00 may 2011 www.richtek.com RT9986 ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. pin configurations (top view) wqfn-32l 4x4 fb1 vout6 fb6 vref fb2 vddm rtcpwr sysr pvdd4 fb4 vchk vneg lx1 pvdd1 bat lx6 pvdd7 fb7 pvdd5 lx5 lx4 en56 fb3 pvdd2 lx7 fb5 pvdd3 lx2 lx3 en1234 en7 33 24 23 22 21 1 2 3 4 10 11 12 13 31 30 29 28 20 19 5 6 9 32 14 27 18 7 15 26 16 25 17 8 gnd rst RT9986 package type qw : wqfn-32l 4x4 (w-type) lead plating system g : green (halogen free and pb free)
3 ds9986-00 may 2011 www.richtek.com RT9986 for 2aa typical application circuit RT9986 gnd 33 (exposed pad) en56 off on 32 25 en1234 22 rtcpwr c11 super cap 3.3v pvdd2 27 24 lx2 26 fb2 l2 2.2h c6 10f x 2 r3 470k r4 150k v bat c5 4.7f 5 fb7 5v d5 en7 8 pvdd1 30 1 lx1 31 fb1 l1 2.2h c4 10f x 2 5v r1 470k r2 88.7k v bat c3 4.7f r10 26.1k pvdd5 lx5 18 20 v bat fb5 19 c13 r9 287k 15v l5 10h 4.7f c14 10f x 2 c12 27pf 21 vddm 1f c1 lx6 fb6 3 28 -7v c18 66.5k r11 10.5k r12 vref 2 l6 10h 4 vout6 d1 10f x 2 c15 1nf c16 0.1f lx4 9 l4 2.2h 10f 1.8v fb4 11 c10 r7 r8 470k 374k 6 pvdd7 10f c9 10 pvdd4 5v or v bat lx7 7 vchk 12 17 r14 10k rtcpwr rst 23 sysr r15 100k 3.3v bat 29 v bat 4.7f c2 360k pvdd3 15 14 lx3 16 fb3 l3 2.2h c7 4.7f r5 768k r6 2.5v c8 5v 10f vneg 13 c17 0.1f c21 4.7pf c22 4.7pf
4 ds9986-00 may 2011 www.richtek.com RT9986 for li-ion RT9986 gnd 33 (exposed pad) en56 off on 32 25 en1234 22 rtcpwr c11 super cap 3.3v lx2 26 24 pvdd2 27 fb2 l2 2.2h c5 10f r3 470k r4 150k v bat c6 4.7f en7 8 pvdd1 30 1 lx1 31 fb1 l1 2.2h c3 10f x 2 5v r1 470k r2 88.7k v bat c4 4.7f r10 26.1k pvdd5 lx5 18 20 v bat fb5 19 c13 r9 287k 15v l5 10h 4.7f c14 10f x 2 c12 27pf 21 vddm 1f c1 lx6 fb6 3 28 -7v c18 66.5k r11 10.5k r12 vref 2 l6 10h 4 vout6 d1 10f x 2 c15 1nf c16 0.1f lx4 9 l4 2.2h 10f 1v fb4 11 c10 r7 r8 23.2k 93.1k 4.7f c9 10 pvdd4 5v or v bat vchk 12 17 r14 10k rtcpwr rst 23 sysr r15 100k 3.3v bat 29 v bat 4.7f c2 374k pvdd3 15 14 lx3 16 fb3 l3 2.2h c7 4.7f r5 470k r6 1.8v c8 v bat 10f vneg 13 c17 0.1f 5 fb7 6 pvdd7 lx7 7 l7 10h c19 1f v bat c20 1f d2 d3 d4 r13 10 c21 4.7pf c22 10pf
5 ds9986-00 may 2011 www.richtek.com RT9986 timing diagram timing diagram for ch1 to ch4 ch5 and ch6 power sequence the power on sequence is : when en56 goes high, ch5 will turn on first. after 10ms, ch6 will turn on. the power off sequence is : when en56 goes low, ch6 will turn off first and vout6 will be internally pulled to gnd. when vout6 > ? 0.12v, ch6 discharging completes and then ch5 turns off. finally, the whole ic shuts down. power on sequence : ch5 hv step-up 15v ch6 inv ? 7v power off sequence : ch6 inv ? 7v ch5 hv step-up 15v en1234 ch1 vout ch3 vout ch4 vout ch2 vout user define vddm = max (bat, pvdd1) 3.5ms 3.5ms 3.5ms wait until fb4 < 0.1v wait until fb3 < 0.1v 3.5ms wait until fb2 < 0.1v en56 ch5 vout 10ms ch6 vout discharge by internal n-mosfet wait until vout6 close to 0v constant current pre-charge. 10ms
6 ds9986-00 may 2011 www.richtek.com RT9986 functional pin description pin no. pin name pin function 1 fb1 feedback input pin of ch1. 2 vref 1.8v reference output pin. 3 fb6 feedback input pin of ch6. 4 vout6 sense input pin of ch6 inverting output node. 5 fb7 feedback input pin of ch7 in step-up mode or current sink pin of ch7 in current source mode. 6 pvdd7 power output pin of ch7. 7 lx7 switch node of ch7 in step-up mode. lx7 initial voltage determines ch7 operation mode. 8 en7 enable pin of ch7 and pwm dimming signal input pin. 9 lx4 switch node of ch4. 10 pvdd4 power input pin of ch4. 11 fb4 feedback input pin of ch4. 12 vchk sense pin of voltage detector. 13 vneg output pin of negative regulator. 14 fb3 feedback input pin of ch3. 15 pvdd3 power input pin of ch3. 16 lx3 switch node of ch3. 17 rst voltage detector open drain output pin. 18 fb5 feedback input pin of ch5. 19 pvdd5 power output pin of ch5. 20 lx5 switch node of ch5. 21 vddm ic analog power pin. 22 rtcpwr internal control circuit power pin. that must connect to a bypass capacitor for better noise rejection. 23 sysr system reset open-drain output pin. 24 fb2 feedback input pin of ch2. 25 en1234 enable pin of ch1, ch2, ch3, ch4. 26 lx2 switch node of ch2. 27 pvdd2 power input pin for step-down of ch2. power output pin for step-up of ch2. 28 lx6 switch node of ch6. 29 bat battery power pin. 30 pvdd1 power output pin of ch1. 31 lx1 switch node of ch1. 32 en56 enable pin of ch5, ch6. 33 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum thermal dissipation.
7 ds9986-00 may 2011 www.richtek.com RT9986 function block diagram ch1 c-mode step-up ch2 c-mode step-up or step-down ch3 c-mode step-down + - 0.8v ref ch5 c-mode step-up pwm + - 1.25v ref fb5 lx5 vddm gnd lx1 lx2 fb3 pvdd3 pvdd1 pvdd2 lx3 ch6 inverting pvdd5 lx6 + - fb6 ch7 c-mode step-up or current source + pwm dimming + mode selector + - 0.25v ref fb7 lx7 en7 lx4 fb4 ch4 c-mode step-down + - 0.8v ref pvdd4 en1234 en56 power on/off sequence control logic block vddm bat vddm vddm body diode control vneg vddm vout6 30ma(max.) vddm vddm vddm + - 0.8v ref fb2 + - 0.8v ref fb1 voltage detector sysr vchk fb2 rtcpwr soft-start uvlo uvlo body diode control rtc_ldo w/ body diode control vddi rtcpwr body diode control 0.6v ref 1.8v ref vref pvdd7 body diode control rst sys_reset vddm bat bat bat bat bat vddi
8 ds9986-00 may 2011 www.richtek.com RT9986 electrical characteristics (v ddm = v bat = 3.3v, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z supply input voltage, vddm, ba t --------------------------------------------------------------------- ? 0.3v to 6v z vout6 -------------------------------------------------------------------------------------------------------- ? 10v to 0.3v z lx1, lx2, lx3, lx4 ----------------------------------------------------------------------------------------- ? 0.3v to 6v z pvdd5, lx5 ------------------------------------------------------------------------------------------------- ? 0.3v to 24v z pvdd7, lx7 ------------------------------------------------------------------------------------------------- ? 0.3v to 17v z lx6 ------------------------------------------------------------------------------------------------------------- (bat ? 14v) to (bat + 0.3v) z other pins ---------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c wqfn 32l 4x4 ---------------------------------------------------------------------------------------------- 3.590w z package thermal resistance (note 2) wqfn 32l 4x4, ja ---------------------------------------------------------------------------------------- 27.8 c/w wqfn 32l 4x4, jc ---------------------------------------------------------------------------------------- 7 c/w z junction temperature -------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) ---------------------------------------------------------------- 260 c z storage temperature range ----------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ------------------------------------------------------------------------------- 2kv mm (ma chine mode) --------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z vddm --------------------------------------------------------------------------------------------------------- 2.7v to 5.8v z junction temperature range ----------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ----------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit supply input voltage bat startup voltage v st 1.5 -- -- v bat uvlo threshold bat falling -- 1.3 -- v bat uvlo hysteresis -- 0.2 -- v vddm ovp threshold vddm rising 5.85 6 6.15 v vddm ovp hysteresis -- ? 0.25 -- v vddm uvlo threshold vddm rising 2.2 2.4 2.6 v vddm uvlo hysteresis -- 0.3 -- v supply current shutdown supply current (i bat + i vddm ) i off all en pins = 0, v bat = 3.3v -- 10 20 a ch1 synchronous step-up supply current into vddm i q1 non switching, v en1234 = 3.3v -- -- 800 a ch2 synchronous step-up or step-down supply current into vddm i q2 non switching, v en1234 = 3.3v -- -- 800 a ch3 synchronous step-down supply current into vddm i q3 v en1234 = 3.3v -- -- 800 a to be continued
9 ds9986-00 may 2011 www.richtek.com RT9986 to be continued parameter symbol test conditions min typ max unit ch4 synchronous step-down supply current into vddm i q4 non switching, v en1234 = 3.3v -- -- 800 a ch5 synchronous step-up supply current into vddm i q5 non switching, v en56 = 3.3v -- -- 800 a ch6 (inverting) supply current into vddm i q6 non switching, v en56 = 3.3v -- -- 800 a ch7 (wled) in step-up mode supply current into vddm i q7b non switching, v en7 = 3.3v -- -- 800 a ch7 (wled) in current source mode supply current into vddm i q7c v en7 = 3.3v, v lx7 = 0v -- -- 800 a oscillator ch1, 2, 3, 4 operation frequency f osc 1800 2000 2200 khz ch5, 6, 7 operation frequency f osc2 ch7 in step-up mode 900 1000 1100 khz ch1 maximum duty cycle (step-up) v fb1 = 0.75v 80 83 86 % ch2 maximum duty cycle (step-up) v fb2 = 0.75v 80 83 86 % ch2 maximum duty cycle (step-down) v fb2 = 0.75v -- -- 100 % ch3 maximum duty cycle (step-down) v fb3 = 0.75v -- -- 100 % ch4 maximum duty cycle (step-down) v fb4 = 0.75v -- -- 100 % ch5 maximum duty cycle (step-up) v fb5 = 1.15v 91 93 97 % ch6 maximum duty cycle (inverting) v fb6 = 0.7v 91 93 97 % ch7 maximum duty cycle (step-up) v fb7 = 0.15v 91 93 97 % feedback, regulation voltage feedback regulation voltage @ fb1, fb2, fb3, fb4 0.788 0.8 0.812 v feedback regulation voltage @ fb5 v fb5 1.237 1.25 1.263 v feedback regulation voltage @ fb6 (inverting) v fb6 0.59 0.6 0.61 v feedback regulation voltage @ fb7 v fb7 0.237 0.25 0.263 v output current (cs mode) 28.5 30 31.5 ma dropout voltage @ fb7 (cs mode) v lx7 = 0v -- -- 0.3 v vref output voltage v ref 1.782 1.8 1.818 v vref load regulation 0 a < i ref < 200 a -- -- 10 mv power switch p-mosfet v pvdd1 = 3.3v -- 200 300 ch1 on-resistance n-mosfet r ds(on)1 v pvdd1 = 3.3v -- 150 250 m ch1 current limitation (step-up) i lim1 2.2 3 4 a p-mosfet v pvdd2 = 3.3v -- 200 300 ch2 on resistance n-mosfet r ds(on)2 v pvdd2 = 3.3v -- 150 250 m ch2 current limitation (step-down) i lim2_d 1.2 1.6 2 a ch2 current limitation (step-up) i lim2_u 2.2 3 4 a
10 ds9986-00 may 2011 www.richtek.com RT9986 to be continued parameter symbol test conditions min typ max unit p-mosfet v pvdd3 = 3.3v -- 300 400 ch3 on resistance n-mosfet r ds(on)3 v pvdd3 = 3.3v -- 300 400 m ch3 current limitation (step-down) i lim3 1.2 1.6 2 a p-mosfet v pvdd4 = 3.3v -- 300 400 ch4 on resistance n-mosfet r ds(on)4 v pvdd4 = 3.3v -- 300 400 m ch4 current limitation (step-down) i lim4 1.2 1.6 2 a p-mosfet v pvdd5 = 16v -- 0.8 1 ch5 on resistance n-mosfet r ds(on)5 v pvdd5 = 3.3v -- 0.6 0.8 ch5 current limitation of n-mosfet i lim5 0.9 1.2 1.6 a ch6 on resistance of p-mosfet r ds(on)6 -- 0.5 0.7 ch6 current limitation of p-mosfet i lim6 1 1.5 2 a p-mosfet v pvdd7 = 10v -- 3 -- ch7 on resistance n-mosfet r ds(on)7 v pvdd7 = 3.3v -- 0.9 1.1 ch7 current limitation of n-mosfet i lim7 0.6 0.8 1 a protection over voltage protection of pvdd1 and pvdd2 5.85 6 6.15 v over voltage protection of pvdd5 20 21 22 v over voltage protection of vout6 -- ? 13 -- v over voltage protection of pvdd7 (step-up mode) 14.3 15 16 v ch1, ch2 step-up under voltage protection of pvdd1 and pvdd2 -- v bat ? 0.8v -- v ch1/2/3/4 under voltage protection at v fbx < 0.4v after soft-start ends 0.35 0.4 0.45 v ch5 under voltage protection at v fb5 < 0.6v after soft-start ends 0.5 0.6 0.7 v ch6 under voltage protection at v fb6 > 1.2v after soft-start end 1.1 1.2 1.3 v ch1/2/3/4 over load protection at v fbx < 0.7v after fault delay (100ms) 0.65 0.7 0.75 v ch5 over load protection at v fb5 < 1.1v after fault delay (100ms) 1.05 1.1 1.15 v ch6 over load protection at v fb6 > 0.74v after fault delay (100ms) 0.69 0.74 0.79 v protection fault delay -- 100 -- ms control logic-high 1.3 -- -- en1234, en56, en7 input threshold voltage logic-low -- -- 0.4 v logic-high high to select step-up mode 1 -- -- lx7 input threshold voltage logic-low low to select cs mode -- 0.25 -- v en1234, en56, en7 sink current -- 2 6 a en7 low time for shutdown t shdn -- 32 -- ms
11 ds9986-00 may 2011 www.richtek.com RT9986 note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a high-effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. the measurement case position of jc is on the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit thermal protection thermal shutdown t sd 125 160 -- c thermal shutdown hysteresis t sd -- 20 -- c system reset sysr, fb2 regulation threshold for sysr to go low 0.709 0.72 0.731 v sysr, fb2 hysteres is -- 40 -- mv sysr rising delay time -- 10 -- ms sysr sink capability v sysr = 0.5v 4 -- -- ma voltage detector voltage detector reset threshold (vchk < threshold ? rst = l) vchk falling 1.57 1.6 1.63 v voltage detector reset hysteresis -- 16 -- mv standby current v vchk = 3v -- 2 4 a rst rising delay time 35 55 75 ms rst sink capability v rst = 0.5v, v vchk = 1.5v 4 -- -- ma rtc ldo standby current v ddm = 4.2v -- 5 8 a regulated output voltage @ rtcpwr i out = 0ma 3.1 3.2 3.3 v max output current (current limit) v ddm = 4.2v 60 130 200 ma i out = 50ma -- -- 1000 i out = 10ma -- -- 150 dropout voltage i out = 3ma -- -- 60 mv
12 ds9986-00 may 2011 www.richtek.com RT9986 typical operating characteristics ch1 step-up efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 3v v bat = 2.7v v bat = 2.5v v bat = 2.2v v bat = 2v v bat = 1.8v v out = 3.3v, l = 2.2 h, c out = 10 f x 2 ch1 step-up efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 4.5v v bat = 4.2v v bat = 3.9v v bat = 3.6v v bat = 3.3v v bat = 3v v out = 5v, l = 2.2 h, c out = 10 f x 2 ch2 step-up efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 3.6v v bat = 3.3v v bat = 3v v bat = 2.7v v bat = 2.5v v bat = 2.2v v bat = 1.8v v out = 5v, l = 2.2 h, c out = 10 f x 2 ch2 step-down efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 3.4v v bat = 3.7v v bat = 3.9v v bat = 4.2v v bat = 4.5v v bat = 5v v out = 3.3v, l = 2.2 h, c out = 10 f ch 3 step-down efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 2.7v v bat = 3v v bat = 3.3v v bat = 3.6v v bat = 3.9v v bat = 4.2v v bat = 4.5v v out = 1.8v, l = 2.2 h, c out = 10 f ch4 step-down efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 output current (ma) efficiency (%) v bat = 1.8v v bat = 2.5v v bat = 3v v bat = 3.3v v bat = 3.6v v bat = 4.2v v bat = 4.5v v out = 1v, l = 2.2 h, c out = 10 f
13 ds9986-00 may 2011 www.richtek.com RT9986 ch2 step-up output voltage vs. output current 5.00 5.02 5.04 5.06 5.08 5.10 0 100 200 300 400 500 600 output current (ma) output voltage (v) v bat = 3v v bat = 4.2v v out = 5v ch1 step-up output voltage vs. output current 3.25 3.27 3.29 3.31 3.33 3.35 0 100 200 300 400 500 600 output current (ma) output voltage (v) v bat = 1.8v v bat = 3.2v v out = 3.3v ch1 step-up output voltage vs. output current 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 0 100 200 300 400 500 600 output current (ma) output voltage (v) v bat = 3v v bat = 4.5v v out = 5v ch7 efficiency vs. input voltage 0 10 20 30 40 50 60 70 80 90 100 1.8 2.1 2.4 2.7 3 3.3 3.6 3.9 4.2 4.5 input voltage (v) efficiency (%) i out = 25ma, l = 10 h, c out = 1 f ch6 inverting efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 1 10 100 output current (ma) inverting efficiency (%) v bat = 4.2v v bat = 3.9v v bat = 3.6v v bat = 3.3v v bat = 3v v bat = 2.7v v bat = 4.5v v bat = 2.5v v bat = 2.2v v bat = 2v v out = ? 8v, l = 10 h, c out = 10 f x 2 ch5 step-up efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 output current (a) efficiency (%) v bat = 4.5v v bat = 4.2v v bat = 3.9v v bat = 3.6v v bat = 3.3v v bat = 3v v bat = 2.7v v bat = 2.5v v bat = 2.2v v bat = 2v v out = 16v, l = 10 h, c out = 10 f x 2
14 ds9986-00 may 2011 www.richtek.com RT9986 v bat = 3.7v time (2.5ms/div) power on sequence v out_ch1 (5v/div) v out_ch2 (2v/div) v out_ch4 (2v/div) v out_ch3 (2v/div) ch2 step-down output voltage vs. output current 3.26 3.28 3.30 3.32 3.34 3.36 0 100 200 300 400 500 600 output current (ma) output voltage (v) v bat = 4.5v v bat = 5v v out = 3.3v ch3 step-down output voltage vs. output current 1.800 1.805 1.810 1.815 1.820 1.825 1.830 0 100 200 300 400 500 600 output current (ma) output voltage (v) v out = 1.8v v bat = 3v v bat = 4.5v ch4 step-down output voltage vs. output current 0.992 0.994 0.996 0.998 1.000 1.002 1.004 1.006 0 100 200 300 400 500 600 output current (ma) output voltage (v) v bat = 4.5v v bat = 2.7v v ba t = 3v v out = 1v ch5 step-up output voltage vs. output current 15.8 15.9 16.0 16.1 16.2 16.3 0 20406080100 output current (ma) output voltage (v) v bat = 3.4v v bat = 4.5v v out = 16v ch6 inverting efficiency vs. output current -8.210 -8.205 -8.200 -8.195 -8.190 0 20406080100 output current (ma) output voltage (v) v bat = 2.7v v bat = 3.4v v bat = 4.5v v out = ? 8v
15 ds9986-00 may 2011 www.richtek.com RT9986 time (500ns/div) ch3 output voltage ripple v out_ch3_ac (5mv/div) lx3 (2v/div) v bat = 3.7v, v out = 1.8v, i out = 400ma, l = 2.2 h, c out = 10 f time (500ns/div) ch1 output voltage ripple v out_ch1_ac (10mv/div) lx1 (2v/div) v bat = 3.7v, v out = 5v, i out = 400ma, l = 2.2 h, c out = 10 f x 2 time (5ms/div) power on sequence v out_ch6 (5v/div) v out_ch5 (10v/div) v bat = 3.7v time (1ms/div) power off sequence v bat = 3.7v v out_ch1 (5v/div) v out_ch2 (2v/div) v out_ch4 (2v/div) v out_ch3 (2v/div) time (2.5ms/div) power off sequence v out_ch6 (5v/div) v out_ch5 (10v/div) v bat = 3.7v time (500ns/div) ch2 output voltage ripple v out_ch2_ac (2mv/div) lx2 (2v/div) v bat = 3.7v, v out = 3.3v, i out = 400ma, l = 2.2 h, c out = 10 f
16 ds9986-00 may 2011 www.richtek.com RT9986 time (1 s/div) ch5 output voltage ripple v out_ch5_ac (10mv/div) lx5 (10v/div) v bat = 3.7v, v out = 16v, i out = 30ma, l = 10 h, c out = 10 f time (1 s/div) ch6 output voltage ripple v out_ch6_ac (10mv/div) lx6 (10v/div) v bat = 3.7v, v out = ? 8v, i out = 50ma, l = 10 h, c out = 10 f x 2 time (1ms/div) ch1 load transient response v out_ch1_ac (100mv/div) i out (100ma/div) v bat = 3.7v, v out = 5v, i out = 0 to 300ma, l = 2.2 h, c out = 10 f x 2 time (1ms/div) ch3 load transient response v out_ch3_ac (50mv/div) i out (100ma/div) v bat = 3.7v, v out = 1.8v, i out = 0 to 300ma, l = 2.2 h, c out = 10 f time (1ms/div) ch2 load transient response v out_ch2_ac (50mv/div) i out (100ma/div) v bat = 3.7v, v out = 3.3v, i out = 0 to 300ma, l = 2.2 h, c out = 10 f time (500ns/div) ch4 output voltage ripple v out_ch4_ac (5mv/div) lx4 (2v/div) v bat = 3.7v, v out = 1v, i out = 400ma, l = 2.2 h, c out = 10 f
17 ds9986-00 may 2011 www.richtek.com RT9986 time (1ms/div) ch6 load transient response v out_ch6_ac (20mv/div) i out (20ma/div) v bat = 3.7v, v out = ? 8v, i out = 15 to 50ma, c out = 10 f x 2 time (1ms/div) ch5 load transient response v out_ch5_ac (50mv/div) i out (20ma/div) v bat = 3.7v, v out = 16v, i out = 10 to 30ma, c out = 10 f time (1ms/div) ch4 load transient response v out_ch4_ac (20mv/div) i out (100ma/div) v bat = 3.7v, v out = 1v, i out = 0 to 300ma, l = 2.2 h, c out = 10 f
18 ds9986-00 may 2011 www.richtek.com RT9986 application information the RT9986 is a multiple output power supply system for digital still cameras and other small handheld devices. it includes six dc/dc converters as well as one wled driver, one rtc ldo, one voltage detector, and one system reset. the wled works in either current source mode or step- up mode. ch1 : step-up synchronous current mode dc/dc converter with internal power mosfets and compensation network. the p-mosfet body can be controlled to disconnect the load. ch2 : step-up or step-down synchronous current mode dc/dc converter with internal power mosfets and compensation network. external circuit topology automatically determines whether ch2 is in step-up or step-down mode. during step-up mode, the p-mosfet body can be controlled to disconnect the load if input voltage is not higher than the v bat . ch3 : step-down synchronous current mode dc/dc converter with internal power mosfets and compensation network. ch4 : step-down synchronous current mode dc/dc converter with internal power mosfets and compensation network. ch5 : step-up synchronous current mode dc/dc converter with internal power mosfet and compensation network. the p-mosfet body can be controlled to disconnect the load. ch6 : asynchronous inverting current mode dc/dc converter with internal power mosfet and compensation network. ch7 : a wled driver operating in either current source mode or synchronous step-up mode with internal power mosfet and compensation network. operation mode is determined by lx7 initial voltage the p-mosfet body in step-up mode can be controlled to disconnect the load disconnected. ch1 to ch4 operate in pwm mode with 2mhz, while ch5 to ch7 operate in pwm mode with 1mhz switching frequency. rtc_ldo : a 3.1v output ldo with low quiescent current and high output voltage accuracy. system reset : accurate voltage detector for checking ch2 output voltage status. voltage detector : a general, low quiescent current voltage detector for monitoring status of a node voltage such as for rtc_ldo output or others. ch1 : synchronous step-up dc/dc converter ch1 is a synchronous step-up converter which can be used for motor power. the converter operates at fixed frequency and pwm current mode. the converter integrates internal mosfets, compensation network and synchronous rectifier for up to 95% efficiency. the output voltage can be set by the following equation : v out_ch1 = (1 + r1 / r2) x v fb1 where v fb1 is 0.8v typically. ch2 : synchronous step-up / step-down selectable dc/dc converter ch2 is a synchronous step-up / step-down auto-select converter, typically for system i/o power. in either step- up or step-down, the converter operates in fixed frequency pwm mode, continuous current mode (ccm), and discontinuous current mode (dcm) with internal mosfets, compensation network and synchronous rectifiers for up to 95% efficiency. step-up : in step-up mode, ch2 also disconnects the load from its input power node and discharges output node of ch2 when it is turned off. step-down : in step-down mode, the ch2 converter can be operated at 100% maximum duty cycle to extend the input operating voltage range. when the input voltage is close to the output voltage, the converter enters low dropout mode. the output voltage can be set by the following equation : v out_ch2 = (1 + r3 / r4) x v fb2 where v fb2 is 0.8v typically.
19 ds9986-00 may 2011 www.richtek.com RT9986 table 1. ch7 wled setting ch7 operating mode lx7 current source < 0.25v synchronous step-up > 1v ch3 : synchronous step-down dc/dc converter ch3 operates in fixed frequency pwm mode with integrated internal mosfets and compensation network. the ch3 step-down converter can be operated at 100% maximum duty cycle to extend battery operating voltage range. when the input voltage is close to the output voltage, the converter enters low dropout mode with low output ripple. the output voltage can be set by the following equation : v out_ch3 = (1 + r5 / r6) x v fb3 where v fb3 is 0.8v typically. ch4 : synchronous step-down dc/dc converter ch4 operates at fixed frequency pwm mode with integrated internal mosfets and compensation network. the ch4 step-down converter can be operated at 100% maximum duty cycle to extend battery operating voltage range. when the input voltage is close to the output voltage, the converter enters low dropout mode with low output ripple. the output voltage can be set by the following equation: v out_ch4 = (1 + r7 / r8) x v fb4 where v fb4 is 0.8v typically. ch5 : synchronous step-up dc/dc converter ch5 is a high voltage synchronous step-up converter for ccd positive power. the converter operates at fixed frequency pwm mode, ccm, dcm, and psm (pulse skip mode) with integrated internal mosfets, compensation network and load disconnect function. the output voltage can be set by the following equation: v out_ch5 = (1 + r9 / r10) x v fb5 where v fb5 is 1.25v typically. ch6 : inv dc/dc converter this converter integrates an internal p-mosfet with internal compensation and needs an external schottky diode to provide ccd negative power supply. the output voltage can be set by the following equation : v out_ch6 = - (r11 / r12) x (1.2v) + 0.6v where r11 and r12 are the feedback resistors connected to fb6, 1.2v equals to (v ref - v fb6 ) and 0.6v is v fb6 typical. reference voltage the RT9986 provides a precise 1.8v reference voltage, v ref , with souring capability of 100 m a. connect a 0.1 m f ceramic capacitor from the vref pin to gnd. reference voltage is enabled by pulling en6 to logic-high. furthermore, this reference voltage is internally pulled to gnd at shutdown. ch7 : wled driver ch7 is a wled driver that can operate in either current source mode or synchronous step-up mode, as determined by lx7 ' s initial voltage level. when ch7 works in current source mode, it sinks an accurate led current modulated by en7 high duty such that it is easily dimmed from 0ma to 30ma. if ch7 works in synchronous step-up mode, it integrates synchronous step-up mode with an internal mosfet and internal compensation to output a voltage up to 15v. the led current is set via an external resistor and controlled via the pwm duty on the en7 pin. regardless of the mode, holding en7 low for more than 32ms will turn off ch7. in addition, ch7 will be turned on until the ch2 soft-start is finished. ch7 wled current dimming control if ch7 is in synchronous step-up mode, the wled current is set by an external resistor. if ch7 is in current source mode, the sink current into the fb7 pin is 30ma typically when en7 is high. regardless of the mode, dimming is always controlled by the duty of pulse-width modulated signal on the en7 pin. the pwm dimming duty must be over 10%. the average current through wled can be set by the following equations : i led (ma) = [250mv / r (w)] x duty (%) (for step-up mode) or i led (ma) = 30ma x duty (%) (for current source mode)
20 ds9986-00 may 2011 www.richtek.com RT9986 r is the current sense resistor from fb7 to gnd and duty is the duty of the pwm dimming signal into en7 pin. dimming frequency range is from 1khz to 100khz but 2khz to 20khz should be avoided to prevent distraction from audio noise. vddm bootstrap to support bootstrap function, the RT9986 includes a power selection circuit which selects between bat and pvdd1 to create the internal node voltage vddi and vddm. vddm is the power of all the RT9986 control circuits and must be connected to an external decoupling capacitor by way of the vddm pin. the vddi is the power input of the rtc ldo. the output pvdd1 of ch1 can bootstrap vddm and vddi. the RT9986 includes uvlo circuits to monitor vddm and bat voltage status. rtc ldo the RT9986 provides a 3.1v output ldo for real time clock. the ldo features low quiescent current (5 m a) and high output voltage accuracy. this ldo is always on, even when the system is shut down. for better stability, is it recommended to connect a 0.1 m f to the rtcpwr pin. the rtc ldo includes pass transistor body diode control to avoid the rtcpwr node from back-charging into the input node vddi. system reset the RT9986 also provides a system voltage detector to monitor system power status via fb2. if fb2 level is lower than 90% setting, the open drain output pin sysr will pull down. when fb2 level is higher than 95% setting, the sysr pin will go high after 10ms. voltage detector the RT9986 provides a voltage detector to detect the voltage status at the vchk pin. the input power of the voltage detector is rtcpwr and the detector is always on. 55ms after vchk voltage > 1.616v, the open drain output /rst will be pulled high. if vchk < 1.6v, the /rst pin will be pulled down to gnd immediately. power on/off sequence for ch1 to ch4 en1234 will turn on/off ch1 to ch4 in preset sequence. ch1 to ch4 power on sequence is: when en1234 goes high, ch1 will turn on first. 3.5ms after ch1 is turned on, ch3 will turn on. 3.5ms after ch3 is turned on, ch4 will turn on. 3.5ms after ch4 is turned on, ch2 will turn on. ch1 to ch4 power off sequence is : when en1234 goes low, ch2 will turn off first and internally discharge output. when fb2 < 0.1v, ch4 will turn off and also internally discharge output via the lx4 pin. when fb4 < 0.1v, ch3 will turn off and internally discharge output via the lx3 pin. likewise, when fb3 < 0.1v, ch1 will turn off and discharge output. after fb1 < 0.1v, ch1 to 4 shutdown sequence will be completed. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) - t a ) / q ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and q ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the RT9986, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, q ja , is layout dependent. for wqfn- 32l 4x4 packages, the thermal resistance, q ja , is 27.8 c/ w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c - 25 c) / (27.8 c/w) = 3.59w for wqfn-32l 4x4 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, q ja . for the RT9986 package, the derating curve in figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.
21 ds9986-00 may 2011 www.richtek.com RT9986 figure 1. derating curves for RT9986 packages layout consideration for the best performance of the RT9986, the following pcb layout guidelines must be strictly followed. } place the input and output capacitors as close as possible to the input and output pins respectively for good filtering. } keep the main power traces as wide and short as possible. } the switching node area connected to lx and inductor should be minimized for lower emi. } place the feedback components as close as possible to the fb pin and keep these components away from the noisy devices. } connect the gnd and exposed pad to a strong ground plane for maximum thermal dissipation and noise protection. figure 2. pcb layout guide l3 gnd c8 r5 r6 c7 v out_ch3 input/output capacitors must be placed as close as possible to the input/output pins. lx should be connected to inductor by wide and short trace, keep sensitive components away from this trace place the feedback components as close as possible to the fb pin and keep away from noisy devices. connect the exposed pad to a ground plane. fb1 vout6 fb6 vref fb2 vddm rtcpwr sysr p v d d 4 f b 4 v c h k v n e g l x 1 p v d d 1 b a t l x 6 pvdd7 fb7 pvdd5 lx5 l x 4 e n 5 6 f b 3 p v d d 2 lx7 fb5 p v d d 3 l x 2 l x 3 e n 1 2 3 4 en7 33 24 23 22 21 1 2 3 4 10 11 12 13 31 30 29 28 20 19 5 6 9 32 14 27 18 7 15 26 16 25 17 8 gnd rst d1 c18 c15 r11 r12 c16 gnd lx6 v out_ch6 l7 c19 c20 r13 d4 d3 d2 l4 v bat r1 r2 gnd c4 l1 c21 gnd v bat gnd c10 r7 r8 c9 v out_ch4 v bat c1 c14 v out_ch5 gnd l5 c13 gnd l6 c2 c6 v bat v out_ch1 c3 gnd l2 gnd c5 r3 c22 r4 v out_ch2 c12 r9 r10 0.0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 0 25 50 75 100 125 ambient temperature ( c) maximum power dissipation (w) four-layers pcb
22 ds9986-00 may 2011 www.richtek.com RT9986 table 2. protection items protection type threshold (typical) refer to electrical spec protection methods ic shutdown delay time reset method bat uvlo bat < 1.3v ic shutdown. no-delay vddm power reset or all enable pins set to low ovp vddm > 6v automatic reset at vddm < 5.75v 100ms vddm power reset or all enable pins set to low vddm uvlo vddm < 2.4v ic shutdown. no-delay vddm power reset or all enable pins set to low current limit n-mosfet current > 3a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low pvdd1 ovp pvdd1 > 6v n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low pvdd1 uvp pvdd1 < (bat - 0.8v) or pvdd1 < 1.28v after soft-start end. n-mosfet off, p-mosfet off. 100ms vddm power reset or all enable pins set to low fb1 uvp fb1 < 0.4v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch1 step-up fb1 over load (ol) fb1 < 0.7v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit n-mosfet current > 3a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low pvdd2 ovp pvdd2 > 6v n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low pvdd2 uvp pvdd2 < (bat - 0.8v) or pvdd2 < 1.28v after soft-start end. n-mosfet off, p-mosfet off. 100ms vddm power reset or all enable pins set to low fb2 uvp fb2 < 0.4v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch2 step-up fb2 over load fb2 < 0.7v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit p-mosfet current > 1.6a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low fb2 uvp fb2 < 0.4v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch2 step-down fb2 over load fb2 < 0.7v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low to be continued
23 ds9986-00 may 2011 www.richtek.com RT9986 protection type threshold (typical) refer to electrical spec protection methods ic shutdown delay time reset method current limit p-mosfet current > 1.6a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low fb3 uvp fb3 < 0.4v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch3 step-down fb3 over load fb3 < 0.7v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit p-mosfet current > 1.6a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low fb4 uvp fb4 < 0.4v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch4 step- down fb4 over load fb4 < 0.7v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit n-mosfet current > 1.2a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low pvdd5 ovp pvdd5 > 21v n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low fb5 uvp fb5 < 0.6v after soft-start end. n-mosfet off, p-mosfet off. no-delay vddm power reset or all enable pins set to low ch5 step-up fb5 over load fb5 < 1.1v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit p-mosfet current > 1.5a p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low vout6 ovp vout6 < - 13v p-mosfet off. no-delay vddm power reset or all enable pins set to low fb6 uvp fb6 >1.2v p-mosfet off. no-delay vddm power reset or all enable pins set to low ch6 inverter fb6 over load fb6 > 0.74v ic shutdown when ol occur each cycle until 100ms. 100ms vddm power reset or all enable pins set to low current limit n-mosfet current > 0.8a n-mosfet off, p-mosfet off. automatic reset at next clock cycle. 100ms vddm power reset or all enable pins set to low ch7 wled pvdd7 ovp pvdd7 > 15v shutdown ch7 not applicable vddm power reset or all enable pins set to low thermal thermal shutdown temperature > 160 c all channels stop switching no-delay vddm power reset or all enable pins set to low
24 ds9986-00 may 2011 www.richtek.com RT9986 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 d 3.900 4.100 0.154 0.161 d2 2.650 2.750 0.104 0.108 e 3.900 4.100 0.154 0.161 e2 2.650 2.750 0.104 0.108 e 0.400 0.016 l 0.300 0.400 0.012 0.016 w-type 32l qfn 4x4 package note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. detail a pin #1 id and tie bar mark options 1 1 2 2

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